A data transfer circuit or a recording apparatus includes an address setting unit for setting a start address for a buffer memory, an offset setting unit for setting an offset for the buffer memory, and an address creating unit for creating a predetermined number of consecutive transfer addresses to be supplied for the buffer memory using a reference address. The circuit also includes an arithmetic logic unit that, after the address creating unit has created transfer addresses using the start address as a reference address, calculates a new reference address in accordance with the offset relative to the start address so as to provide the new reference address to the address creating unit.