An analog-to-digital converter (ADC), including a plurality of first-level folded-differential-logic-encoders (FDLEs), coupled to receive an analog input signal and respective reference voltages and to provide respective outputs responsive to comparing a magnitude of the input signal to the respective reference voltages. The ADC has a second-level resultant FDLE, which is coupled to receive and combine the outputs of the first-level FDLEs to provide a digital value indicative of the magnitude of the input signal.