• 专利标题: Apparatus for selecting bank in semiconductor memory device
  • 申请号: US10028672
    申请日: 2001-12-28
  • 公开(公告)号: US06570808B2
    公开(公告)日: 2003-05-27
  • 发明人: Joo Sang Lee
  • 申请人: Joo Sang Lee
  • 优先权: KR2000/87292 20001230
  • 主分类号: G11C700
  • IPC分类号: G11C700
Apparatus for selecting bank in semiconductor memory device
摘要:
An apparatus for selecting banks in a semiconductor memory device provides a half-chip by adjusting all bits including the most significant bit (MSB) of bank addresses to select normal banks even if degraded banks are included in both upper and lower bank blocks. In a memory including an upper bank block and a lower bank block which are constructed with a plurality of banks selectable by a plurality of bank addresses, an apparatus for selecting the banks includes a plurality of bank address control parts each corresponding to one address bit of the bank addresses, each of the bank address control part applying a fixed logic value to the upper and lower bank blocks according to a selective cutting of at least one of the fuses, and each of the bank address control parts applying either a corresponding bank address bit input thereto or a bank address bit just below the corresponding bank address bit to the upper and lower bank blocks.
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