发明授权
US06579770B2 Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
有权
改善CMOS的侧壁工艺和植入方法，有利于低CGD，改善掺杂特性和对化学处理的不敏感性
- 专利标题： Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
- 专利标题（中）： 改善CMOS的侧壁工艺和植入方法，有利于低CGD，改善掺杂特性和对化学处理的不敏感性
-
申请号： US09899783申请日： 2001-07-05
-
公开(公告)号： US06579770B2公开(公告)日： 2003-06-17
- 发明人: Mark S. Rodder , Mahalingam Nandakumar
- 申请人： Mark S. Rodder , Mahalingam Nandakumar
- 主分类号： H01L21336
- IPC分类号： H01L21336
摘要：
A transistor (30) and method for forming a transistor using an edge blocking material (24) is disclosed herein. The edge blocking material (24) may be located adjacent a gate (22) or disposable gate or may be part of a disposable gate. During an angled pocket implant, the edge blocking material (24) blocks some dopant from entering the semiconductor body (10) and the dopant (18) placed under the edge blocking material is located at a given distance below the surface of the semiconductor body (10).
公开/授权文献
信息查询
