发明授权
- 专利标题: Overvoltage-tolerant interface for integrated circuits
- 专利标题(中): 集成电路的过压容限接口
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申请号: US09860028申请日: 2001-05-16
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公开(公告)号: US06583646B1公开(公告)日: 2003-06-24
- 发明人: Rakesh H. Patel , John E. Turner , Wilson Wong
- 申请人: Rakesh H. Patel , John E. Turner , Wilson Wong
- 主分类号: H03K190175
- IPC分类号: H03K190175
摘要:
An input/output driver for interfacing directly with a voltage at a pad which is above a supply voltage for the input/output driver. This may be referred to as an “overvoltage condition.” For example, if the supply voltage is 3.3 volts, a 5-volt signal may be provided at the pad of the input/output driver. The input/output driver will tolerate this voltage level and prevent leakage current paths. This will improve the performance, reliability, and longevity of the integrated circuit. The input/output driver includes a well-bias generator for preventing leakage current paths.
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