- 专利标题: Apparatus and method of layout generation, and program thereof
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申请号: US09984139申请日: 2001-10-29
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公开(公告)号: US06584599B2公开(公告)日: 2003-06-24
- 发明人: Takashi Fujii
- 申请人: Takashi Fujii
- 优先权: JP2001-176955 20010612
- 主分类号: G06F1750
- IPC分类号: G06F1750
摘要:
A layout generating apparatus and a layout generating method to obtain high-quality optimization results (improvements in operation speed and the degree of integration and a reduction in power consumption). Specifically, there are disposed input data storage part (1), before-compaction layout generating part (2), first compaction processing part (3), second compaction processing part (4), third compaction processing part (5), mid-course-processing data storage part (6), channel-width optimization processing part (7), layout optimization processing part (8), output data storage part (9), and control part (10). The operations of all the mentioned parts are controlled by the control part (10).
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