Invention Grant
- Patent Title: Method for patterning resist
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Application No.: US09817408Application Date: 2001-03-26
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Publication No.: US06586160B2Publication Date: 2003-07-01
- Inventor: Chung-Peng Ho , Bernard J. Roman , Chong-Cheng Fu
- Applicant: Chung-Peng Ho , Bernard J. Roman , Chong-Cheng Fu
- Main IPC: G03F720
- IPC: G03F720

Abstract:
A resist layer (34) on a semiconductor wafer (20) is patterned by using a scanning exposure system (50) which provides light, containing pattern information which is intended to be transferred to the wafer. The lithographic system is a step and scan system in which a reticle (16) passes between a light source and a lens system(18). The wafer with the resist layer is passed through a focal plane of the patterned light at a tilt angle (&thgr;). The user selects a desirable range for the depth of the resist to be exposed at the focus of the patterned light. The tilt angle is calculated by taking the arc tangent of the desirable range divided by a width of a slit region (52) of the projected light. The depth of focus increases over standard step and scan techniques.
Public/Granted literature
- US20020136992A1 Method for patterning resist Public/Granted day:2002-09-26
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