发明授权
US06598156B1 Mechanism for handling failing load check instructions 有权
处理故障负载检查说明的机制

  • 专利标题: Mechanism for handling failing load check instructions
  • 专利标题(中): 处理故障负载检查说明的机制
  • 申请号: US09471308
    申请日: 1999-12-23
  • 公开(公告)号: US06598156B1
    公开(公告)日: 2003-07-22
  • 发明人: Judge K. Arora
  • 申请人: Judge K. Arora
  • 主分类号: G06F938
  • IPC分类号: G06F938
Mechanism for handling failing load check instructions
摘要:
A mechanism is provided for recovering from a failing load check instruction in a processor that implements advanced load instructions. An advanced load address table (ALAT) tracks status information for the advanced load instruction. The status information is read when an associated load check operation is processed, and an exception is triggered if the status information indicates data returned by the advanced load operation was modified by a subsequent store operation. The load check instruction is converted to a load operation, instructions are flushed from the processor's instruction execution pipeline, and the pipeline is resteered to the first instruction that follows the load check instruction.
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