发明授权
- 专利标题: Electrostatic discharge protection circuit for a semiconductor device
- 专利标题(中): 一种半导体器件的静电放电保护电路
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申请号: US09946492申请日: 2001-09-06
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公开(公告)号: US06600198B2公开(公告)日: 2003-07-29
- 发明人: Takahiro Ohnakado , Satoshi Yamakawa
- 申请人: Takahiro Ohnakado , Satoshi Yamakawa
- 优先权: JP2001-106939 20010405
- 主分类号: H01L2362
- IPC分类号: H01L2362
摘要:
A semiconductor device having high ESD resistance includes an internal circuit, an I/O pad, a division circuit connected to a lead-in line connecting the internal circuit and the I/O pad for outputting an electric signal from first and second terminals corresponding to an electric signal applied to the lead-in line and a clamp circuit including an MOS transistor for cutting off conduction when a difference in voltage between electric signals sent between the terminals is smaller in absolute value than a threshold voltage of the MOS transistor, and conducts when the absolute value is at least equal to the threshold voltage.
公开/授权文献
- US20020146878A1 SEMICONDUCTOR DEVICE 公开/授权日:2002-10-10
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