- 专利标题: Semiconductor memory device
-
申请号: US09963828申请日: 2001-09-25
-
公开(公告)号: US06600672B2公开(公告)日: 2003-07-29
- 发明人: Mitsuaki Hayashi
- 申请人: Mitsuaki Hayashi
- 优先权: JP2000-292177 20000926
- 主分类号: G11C1700
- IPC分类号: G11C1700
摘要:
A semiconductor memory device capable of reading out data at a higher speed and occupying a decreased chip-area is provided. The device includes a bit line selection circuit including a plurality of first transistors for selecting a plurality of bit lines according to a plurality of column selection signals generated based on address signals, a bit line charging circuit including a plurality of second transistors for charging the plurality of bit lines, respectively, and a bit line grounding circuit including a plurality of third transistors for connecting the plurality of bit lines with a ground potential. This enables the decrease in a charging time during a bit line precharging operation and a discharging time during data reading-out operation. Further, by grounding adjacent bit lines that are not involved in a precharging or reading-out operation so that they have a ground potential, it is also possible to minimize bit line intervals without causing a malfunction due to an increase in capacitances between the bit lines.
公开/授权文献
- US20020036914A1 Semiconductor memory device 公开/授权日:2002-03-28
信息查询