发明授权
US06603072B1 Making leadframe semiconductor packages with stacked dies and interconnecting interposer 有权
制造具有堆叠管芯和互连插件的引线框半导体封装

  • 专利标题: Making leadframe semiconductor packages with stacked dies and interconnecting interposer
  • 专利标题(中): 制造具有堆叠管芯和互连插件的引线框半导体封装
  • 申请号: US09828046
    申请日: 2001-04-06
  • 公开(公告)号: US06603072B1
    公开(公告)日: 2003-08-05
  • 发明人: Donald C. FosterDavid A. Zoba
  • 申请人: Donald C. FosterDavid A. Zoba
  • 主分类号: H05K702
  • IPC分类号: H05K702
Making leadframe semiconductor packages with stacked dies and interconnecting interposer
摘要:
In a leadframe type of semiconductor package, the internal electrical interconnectability of and signal routing between multiple dies laminated in a stack with the die paddle of the leadframe is substantially enhanced by laminating an “interposer” in the stack. The interposer comprises a dielectric layer and a metallic layer patterned to include wire bonding pads arrayed around the periphery of a surface thereof, and circuit traces interconnecting selected ones of the wire bonding pads in a single plane across the horizontal span of the interposer. In packages having multiple dies and relatively few leads, the bonding pads and circuit traces can be flexibly arranged on the interposer by the package designer to substantially increase the number and routings of internal electrical interconnections otherwise possible between the dies and between the dies and the leads of the package.
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