Process of making a semiconductor using dual inorganic hardmask in single damascene process integration scheme in an organic low k interlayer dielectric (ILD) by: providing semiconductor substrate; depositing organic low k ILD layer on substrate; forming hardmask 1 on organic low k ILD layer and forming sacrificial hardmask 2 on hardmask 1; forming a patterned photoresist layer on sacrificial hardmask 2; etching selective to sacrificial hardmask 2 and stripping photoresist; etching of hardmask 1 in which the etch is selective to the organic low k ILD layer; depositing a liner or conformal barrier layer over the substrate, organic low k ILD layer, hardmask 1 and hardmask 2; forming a plated metal layer over the liner or conformal barrier layer; and removing metal layer and removing liner with simultaneous removal of sacrificial hardmask 2 so that facets in sacrificial hardmask 2 are removed during liner/sacrificial hardmask 2 removal.