A semiconductor device comprises at least one first semiconductor layer (1-4) and a second layer (8) applied on at least a surface portion of the first layer for protecting the device. The protecting layer is of a second material having a larger energy gap between the valence band and the conduction band than a first material forming said first layer. The second material has at least in one portion of said protecting layer a nano-crystalline and amorphous structure by being composed of crystalline gains with a size less than 100 nm and a resistivity at room temperature exceeding 1×1010 &OHgr;cm.