An image processing apparatus which outputs image data by electrically scaling an image in synchronism with a prescribed clock includes a memory with a one-line capacity for storing image data. A write address in the memory is initialized on a page by page basis and is incremented in accordance with a specified magnification ratio and with the position of a specified region, while a read address in the memory is initialized on a page by page basis and is incremented in accordance with the specified. magnification ratio and with the position of a specified region. The incrementing of the read address is started with a delay of one line with respect to the write address, with provisions made to generate an equal number of write addresses and read addresses per line. This makes scaling and translational transformations in the main scanning direction possible while allowing memory write and read operations to be performed simultaneously with a memory capacity of only one line.