发明授权
- 专利标题: Semiconductor device having steady substrate potential
- 专利标题(中): 半导体器件具有稳定的衬底电位
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申请号: US09433382申请日: 1999-11-03
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公开(公告)号: US06677676B1公开(公告)日: 2004-01-13
- 发明人: Yoshiki Wada , Kimio Ueda
- 申请人: Yoshiki Wada , Kimio Ueda
- 优先权: JP11-129467 19990511
- 主分类号: H01L2348
- IPC分类号: H01L2348
摘要:
A semiconductor device having an SOI structure having a contact for making steady the potential of a semiconductor substrate without involvement of an increase in the surface of the semiconductor device. In a semiconductor chip, an integrated circuit is fabricated within an internal circuit region, and a plurality of buffer circuits are fabricated within buffer regions. Wiring layers for supplying steady potential are formed in the area of the semiconductor chip other than the internal circuit region and the buffer regions; for example, at four corners of the semiconductor chip, and contacts for connecting the wiring layers and the semiconductor substrate are formed in the area of the integrated circuit which is not assigned for fabrication of integrated circuits, thus eliminating a necessity for ensuring a location specifically allocated for formation of the contacts.
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