发明授权
- 专利标题: Logic analyzer testing method and configuration and interface assembly for use therewith
- 专利标题(中): 逻辑分析仪测试方法及其配置和接口组合
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申请号: US10259206申请日: 2002-09-27
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公开(公告)号: US06685498B1公开(公告)日: 2004-02-03
- 发明人: Ronald Jones , Scott Scheeler , Richard Graham
- 申请人: Ronald Jones , Scott Scheeler , Richard Graham
- 主分类号: H01R1118
- IPC分类号: H01R1118
摘要:
The logic analyzer interface assembly connects to a unit under test (UUT). The interface assembly includes an interface board having interface contact points matching the pattern of the UUT contact points. The interface board is mounted to a transfer interface including a probe plate and multiple spring loaded probes extending through the probe plate. The probes contact the UUT contact points at one end and the interface contact points at the other end. When assembled, the UUT and interface assembly form a sandwiched testing assembly that can be inserted into a chassis to aid in approaching an “at speed” observation opportunity.
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