发明授权
- 专利标题: Apparatus and method for testing semiconductor integrated circuit
- 专利标题(中): 半导体集成电路测试装置及方法
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申请号: US09927404申请日: 2001-08-13
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公开(公告)号: US06690189B2公开(公告)日: 2004-02-10
- 发明人: Hisaya Mori , Shinji Yamada , Teruhiko Funakura
- 申请人: Hisaya Mori , Shinji Yamada , Teruhiko Funakura
- 优先权: JP2001-032847 20010208
- 主分类号: G01R3102
- IPC分类号: G01R3102
摘要:
There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table—in which hardware requirements required for conducting a test are set on a per-numeric-code basis—is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.
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