发明授权
US06690609B2 Memory device and method having data path with multiple prefetch I/O configurations
有权
具有多个预取I / O配置的数据路径的存储器件和方法
- 专利标题： Memory device and method having data path with multiple prefetch I/O configurations
- 专利标题（中）： 具有多个预取I / O配置的数据路径的存储器件和方法
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申请号： US10278529申请日： 2002-10-22
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公开(公告)号： US06690609B2公开(公告)日： 2004-02-10
- 发明人: Brent Keeth , Brian Johnson , Troy A. Manning
- 申请人： Brent Keeth , Brian Johnson , Troy A. Manning
- 主分类号： G11C700
- IPC分类号： G11C700
摘要：
A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to 4 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 4 data bus terminals. In the low speed mode, two sets of prefetched data bits are transferred in parallel to 8 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 8 data bus terminals.