发明授权
US06694421B2 Cache memory bank access prediction 有权
缓存存储器存取预测

Cache memory bank access prediction
摘要:
A cache bank prediction unit is provided for use in a processor having a plurality of cache memory banks. The cache bank prediction unit has an input port that receives an instruction. The cache bank prediction unit also has an evaluation unit, coupled to the input port, that predicts which of the plurality of cache banks is associated with the instruction.
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