发明授权
US06697277B2 Content addressable memory (CAM) having a match line circuit with selectively adjustable pull-up impedances
有权
内容可寻址存储器(CAM)具有具有选择性可调的上拉阻抗的匹配线路电路
- 专利标题: Content addressable memory (CAM) having a match line circuit with selectively adjustable pull-up impedances
- 专利标题(中): 内容可寻址存储器(CAM)具有具有选择性可调的上拉阻抗的匹配线路电路
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申请号: US10421963申请日: 2003-04-23
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公开(公告)号: US06697277B2公开(公告)日: 2004-02-24
- 发明人: Fred J. Towler , Reid A. Wistort , Jason Rotella
- 申请人: Fred J. Towler , Reid A. Wistort , Jason Rotella
- 主分类号: G11C1500
- IPC分类号: G11C1500
摘要:
A match line circuit in a content addressable memory (CAM) has a match line coupled to a first pull-up device and a first pull-down device at a match node. The first pull-up device has selectively adjustable pull-up impedances associated with it. The match line circuit also includes a second pull-up device coupled to a second pull-down device at a float node, and an enabling signal for activating the match line circuit during a memory comparison operation. The enabling signal precharges the match node to a logic low level and the float node to a logic high level in between memory comparison operations.