发明授权
US06707095B1 Structure and method for improved vertical MOSFET DRAM cell-to-cell isolation 有权
用于改进垂直MOSFET DRAM单元到单元隔离的结构和方法

Structure and method for improved vertical MOSFET DRAM cell-to-cell isolation
摘要:
A method is provided for forming a vertical transistor memory cell structure with back-to-back FET cells which are formed in a planar semiconductor substrate with a plurality of deep trenches having vertical FET devices and a plurality of capacitors each located in a separate trench that is formed in the semiconductor substrate. Bilateral outdiffusion strap regions are formed extending into a doped semiconductor well region in the substrate. There are confronting pairs of outdiffusion strap regions extending from adjacent deep benches into the doped well region. An isolation diffusion region is formed in the doped well separating the confronting isolation diffusion regions by extending therebetween.
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