发明授权
US06711075B2 Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device
失效
半导体晶片,半导体芯片和半导体器件的制造方法
- 专利标题: Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device
- 专利标题(中): 半导体晶片,半导体芯片和半导体器件的制造方法
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申请号: US09906060申请日: 2001-07-17
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公开(公告)号: US06711075B2公开(公告)日: 2004-03-23
- 发明人: Yoshikazu Saitoh , Sadayuki Morita , Takahiro Sonoda
- 申请人: Yoshikazu Saitoh , Sadayuki Morita , Takahiro Sonoda
- 优先权: JP2000-218234 20000719
- 主分类号: G11C700
- IPC分类号: G11C700
摘要:
By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.
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