发明授权
US06713826B2 Method for fabricating a semiconductor device having contacts self-aligned with a gate electrode thereof
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用于制造具有与其栅电极自对准的触点的半导体器件的方法
- 专利标题： Method for fabricating a semiconductor device having contacts self-aligned with a gate electrode thereof
- 专利标题（中）： 用于制造具有与其栅电极自对准的触点的半导体器件的方法
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申请号： US10356501申请日： 2003-02-03
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公开(公告)号： US06713826B2公开(公告)日： 2004-03-30
- 发明人: Takashi Uehara , Masato Kanazawa
- 申请人： Takashi Uehara , Masato Kanazawa
- 优先权： JP11-081510 19990325
- 主分类号： H01L2976
- IPC分类号： H01L2976
摘要：
A gate electrode is made up of a lower electrode of polysilicon and an upper electrode including a low-resistance film. A nitride sidewall is formed to cover at least the side faces of an insulator cap and the upper electrode. A pad oxide film is formed to cover at least part of the side faces of the lower electrode and part of the upper surface of a semiconductor substrate. Since a second nitride sidewall is formed to cover the first nitride sidewall and the pad oxide film, a self-aligned contact hole can be formed by etching. As a result, a semiconductor device with a highly reliable self-aligned contact can be obtained.
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