发明授权
- 专利标题: Programmable logic with lower internal voltage circuitry
- 专利标题(中): 具有较低内部电压电路的可编程逻辑
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申请号: US10366814申请日: 2003-02-13
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公开(公告)号: US06724222B2公开(公告)日: 2004-04-20
- 发明人: Rakesh H. Patel , John E. Turner , John D. Lam , Wilson Wong
- 申请人: Rakesh H. Patel , John E. Turner , John D. Lam , Wilson Wong
- 主分类号: H03K19175
- IPC分类号: H03K19175
摘要:
A technique and circuitry interfaces a programmable logic integrated circuit compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, an on-chip voltage less than the external supply level of the programmable logic integrated circuit is provided to a core portion of a programmable logic integrated circuit by way of a conversion transistor. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. Externally, the programmable logic integrated circuit will interface with an external supply voltage level. The input and output signals to and from the programmable logic integrated circuit will be compatible with the external supply level.
公开/授权文献
- US20030117174A1 Programmable logic with lower internal voltage circuitry 公开/授权日:2003-06-26
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