发明授权
- 专利标题: Method of forming a shallow trench isolation in a semiconductor substrate
- 专利标题(中): 在半导体衬底中形成浅沟槽隔离的方法
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申请号: US10163239申请日: 2002-06-04
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公开(公告)号: US06727159B2公开(公告)日: 2004-04-27
- 发明人: Yi-Nan Chen , Hsien-Wen Liu , Kaan-Lu Tzou
- 申请人: Yi-Nan Chen , Hsien-Wen Liu , Kaan-Lu Tzou
- 优先权: TW91101348A 20020128
- 主分类号: H01L2176
- IPC分类号: H01L2176
摘要:
A method of forming a shallow trench isolation in a semiconductor substrate. First, a hard mask consisting of a pad nitride and a pad oxide is formed on the semiconductor substrate. The semiconductor substrate is anisotrpically etched to form a trench while the hard mask is used as the etching mask. A thermal oxide film is grown on the trench. Then, a nitride liner is formed on the thermal oxide film. Next, a silicon rich oxide layer is conformally deposited on the nitride liner by high density plasma chemical vapor deposition without a bias voltage applied to the semiconductor substrate. Then, a silicon oxide is deposited to fill the trench by high density plasma chemical vapor deposition while a bias voltage is applied to the semiconductor substrate.
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