发明授权
US06730974B2 Semiconductor devices, memory systems and electronic apparatuses with improved latch up suppression 有权
具有改进的闭锁抑制的半导体器件,存储器系统和电子设备

  • 专利标题: Semiconductor devices, memory systems and electronic apparatuses with improved latch up suppression
  • 专利标题(中): 具有改进的闭锁抑制的半导体器件,存储器系统和电子设备
  • 申请号: US10150498
    申请日: 2002-05-16
  • 公开(公告)号: US06730974B2
    公开(公告)日: 2004-05-04
  • 发明人: Junichi KarasawaKunio Watanabe
  • 申请人: Junichi KarasawaKunio Watanabe
  • 优先权: JP2001-146348 20010516
  • 主分类号: H01L2976
  • IPC分类号: H01L2976
Semiconductor devices, memory systems and electronic apparatuses with improved latch up suppression
摘要:
Semiconductor devices are provided that include a memory cell having load transistors, driver transistors, and transfer transistors. The semiconductor device has a first element-forming region that can be provided in, for example, a p-well region. The first element-forming region can include includes a first active region, a second active region, a third active region, a fourth active region and a fifth active region. The third active region, the fourth active region and the fifth active region can be provided between the first active region and the second active region. The first active region and the second active region can be continuous with the third active region, the fourth active region and the fifth active region, respectively. Thus, semiconductor devices can be provided having element-forming regions that can be readily formed. Memory systems and electronic equipment that include such semiconductor devices can also be provided.
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