发明授权
US06732203B2 Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus
有权
选择性地将存储器耦合全局总线数据位复合到较窄的功能单元耦合本地总线
- 专利标题: Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus
- 专利标题(中): 选择性地将存储器耦合全局总线数据位复合到较窄的功能单元耦合本地总线
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申请号: US10109826申请日: 2002-03-29
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公开(公告)号: US06732203B2公开(公告)日: 2004-05-04
- 发明人: Ruban Kanapathippillai , Kumar Ganapathy , Thu Nguyen , Siva Venkatraman , Earle F. Philhower, III , Manoj Mehta , Kenneth Malich
- 申请人: Ruban Kanapathippillai , Kumar Ganapathy , Thu Nguyen , Siva Venkatraman , Earle F. Philhower, III , Manoj Mehta , Kenneth Malich
- 主分类号: G06F1338
- IPC分类号: G06F1338
摘要:
In one embodiment, a bus multiplexer is between a memory and a functional unit of the integrated circuit. An input of the bus multiplexer couples to a global bus having a bit width. A local bus having a lesser bit width couples to an output of the bus multiplexer. The bus multiplexer selectively multiplexes bits of data on the global bus onto bits of the local bus. In another embodiment, an integrated circuit comprises a memory, a global bus, and a functional unit coupled together. The functional unit includes a bus multiplexer with an input coupled to the global bus, and a local bus coupled to an output of the bus multiplexer. The bus width of the local bus is less than that of the global bus. The bus multiplexer selects data from a subset of bits of the global bus to couple onto the bits of the local bus.