Self-aligned semiconductor interconnect barrier and manufacturing method therefor

发明授权

US06734559B1 Self-aligned semiconductor interconnect barrier and manufacturing method therefor 有权

标题翻译：自对准半导体互连屏障及其制造方法

请登陆查看更多内容

专利标题： Self-aligned semiconductor interconnect barrier and manufacturing method therefor
专利标题（中）： 自对准半导体互连屏障及其制造方法
申请号： US09663021

申请日： 2000-09-15
公开(公告)号： US06734559B1

公开(公告)日： 2004-05-11
发明人: Kai Yang , Takeshi Nogami , Dirk Brown , Shekhar Pramanick
申请人： Kai Yang , Takeshi Nogami , Dirk Brown , Shekhar Pramanick
主分类号： H01L2348
IPC分类号： H01L2348

Self-aligned semiconductor interconnect barrier and manufacturing method therefor

摘要：

A self-aligned semiconductor interconnect barrier between channels and vias is provided which is self-aligned and made of a metallic barrier material. A channel is conventionally formed in the semiconductor dielectric, lined with a first metallic barrier material, and filled with a conductive material. A recess is etched to a predetermined depth into the conductive material, and the second metallic barrier material is deposited and removed outside the channel. This leaves the conductive material totally enclosed in metallic barrier material. The metallic barrier material is selected from metals such as tantalum, titanium, tungsten, compounds thereof, alloys thereof, and combinations thereof.

摘要（中）：

提供通道和通孔之间的自对准半导体互连屏障，其自对准并由金属阻挡材料制成。通常在半导体电介质中形成通道，衬有第一金属阻挡材料，并填充有导电材料。将凹陷蚀刻到导电材料中的预定深度，并且将第二金属阻挡材料沉积并移除到通道外。这使得导电材料完全封闭在金属阻挡材料中。金属阻隔材料选自钽，钛，钨等金属，其化合物，合金及其组合。

信息查询

Espacenet