A semiconductor integrated circuit includes a first power supply line which supplies an external power supply voltage provided from an exterior of the circuit, a second power supply line which supply an internal power supply voltage to an interior circuit, a plurality of NMOS transistors which are situated at different locations, and have drain nodes thereof coupled to the first power supply line and source nodes thereof coupled to the second power supply line, and a regulator circuit which supplies a reference voltage to gate nodes of the plurality of NMOS transistors.