发明授权
- 专利标题: Processing packets in cache memory
- 专利标题(中): 在高速缓存中处理数据包
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申请号: US10105151申请日: 2002-03-25
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公开(公告)号: US06745289B2公开(公告)日: 2004-06-01
- 发明人: Frederick Gruner , Elango Ganesan , Nazar Zaidi , Ramesh Panwar
- 申请人: Frederick Gruner , Elango Ganesan , Nazar Zaidi , Ramesh Panwar
- 主分类号: G06F1200
- IPC分类号: G06F1200
摘要:
A system for processing data includes a first set of cache memory and a second set of cache memory that are each coupled to a main memory. A compute engine coupled to the first set of cache memory transfers data from a communications medium into the first set of cache memory. The system transfers the data from the first set of cache memory to the second set of cache memory, in response to a request for the data from a compute engine coupled to the second set of cache memory. Data is transferred between the sets of cache memory without accessing main memory, regardless of whether the data has been modified. The data is also transferred directly between sets of cache memory when the data is exclusively owned by a set of cache memory or shared by sets of cache memory. In one implementation, the above-described cache memory arrangement is employed with a compute engine that provides different network services, including but not limited to: 1) virtual private networking; 2) secure sockets layer processing; 3) web caching; 4) hypertext mark-up language compression; 5) virus checking; 6) firewall support; and 7) web switching.
公开/授权文献
- US20030154346A1 Processing packets in cache memory 公开/授权日:2003-08-14
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