发明授权
- 专利标题: Method of manufacturing semiconductor integrated circuit device comprising a memory cell and a capacitor
- 专利标题(中): 包括存储单元和电容器的半导体集成电路器件的制造方法
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申请号: US10083416申请日: 2002-02-27
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公开(公告)号: US06746913B2公开(公告)日: 2004-06-08
- 发明人: Tsuyoshi Fujiwara , Takeshi Saikawa , Ryouichi Furukawa , Masato Kunitomo
- 申请人: Tsuyoshi Fujiwara , Takeshi Saikawa , Ryouichi Furukawa , Masato Kunitomo
- 优先权: JP2001-285248 20010919
- 主分类号: H01L218242
- IPC分类号: H01L218242
摘要:
A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450° C. to 700° C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.
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