发明授权
- 专利标题: Methods and systems for predicting IC chip yield
- 专利标题(中): 用于预测IC芯片产量的方法和系统
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申请号: US10281433申请日: 2002-10-24
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公开(公告)号: US06751519B1公开(公告)日: 2004-06-15
- 发明人: Akella V. S. Satya , Li Song , Robert Thomas Long , Kurt H. Weiner
- 申请人: Akella V. S. Satya , Li Song , Robert Thomas Long , Kurt H. Weiner
- 主分类号: G06F1900
- IPC分类号: G06F1900
摘要:
Disclosed are methods and apparatus for efficiently managing IC chip yield learning. In general terms, as each wafer lot moves through fabrication, yield information is obtained from each set of test structures for a particular process or defect mechanism. The nature of the yield information is such that it may be used directly or indirectly to predict product wafer test yield. In one implementation, the yield information includes a systematic yield (Y0), a defect density (DD), and a defect clustering factor (&agr;) determined based on the inspected test structure's yield. A running average of the yield information for each process or defect mechanism is maintained as each wafer lot is processed. As a particular wafer lot moves through the various processes, a product wafer-sort test yield may be predicted at any stage in the fabrication process based on the running-average yield information maintained for previously fabricated wafer lots.