An LCD apparatus has a control circuit 40 which makes a timing of the rear edges of scanning pulses provided to predetermined scanning lines coincide with the time when the display potential is renewed, wherein each of the predetermined scanning lines corresponds to an addition of a picture line to a picture or a reduction from two picture lines to one picture line on a picture in order to compensate for a difference between the number of scanning lines of the LCD and the number of lines of the picture to be displayed. In the control circuit, a circuit detects cycle times of the vertical and horizontal sync pulses, an MPU determines the reference value REF on the basis of the detected value and count CH of the horizontal sync pulse *HS from a counter, and a circuit generates a signal AE which makes the time when the pulse count CD of pixel clock CLKD from the counter becomes equal to the REF that coincides with the timing of the rear edge of scanning pulse.