A digital input signal is modulated using multiple digital signal modulators operating at a variety of clock frequencies and clock frequency phase relationships to drive a load, such as an opposed current amplifier or other opposed current converter. The combinations of frequency relationships and digital signal modulator elements provide significant digital signal processing capabilities and flexible output signal timing. In one embodiment, a digital input signal, which may be biased, is modulated by multiple digital signal modulators to generate corresponding output signals. The corresponding output signals are utilized to drive a load, such as a half bridge, opposed current amplifier and to produce a single output signal. By adjusting the phase relationships between the clock frequencies, various output signal characteristics are achieved. Additionally, by utilizing digital signal processing to modulate the input signal, various processing technologies are applied to the input signal. For example, noise shaping may be implemented using delta-sigma modulators as one stage in digital signal modulators.