Provided are a method of manufacturing a semiconductor, a nonvolatile semiconductor memory device and a method of manufacturing the same, wherein: the memory device has a plurality of memory cells; a buried diffusion layer serves as a signal line; and, a buried diffusion layer disposed adjacent to each of opposite end portions of a lower floating gate is free from variations in width resulted from misalignment occurring in an optical aligner. In the memory device, for example: the floating gate is formed in an active region of a P-type semiconductor substrate through a gate oxide film; an N-type drain region and an N-type source region are formed in opposite end portions of the floating gate; and, a pair of device isolation shielding electrode extends in parallel with the floating gate outside both the drain region and the source region to cover adjacent ones of the memory cells.