发明授权
- 专利标题: Vertical DRAM punchthrough stop self-aligned to storage trench
- 专利标题(中): 垂直DRAM穿透停止自对准到存储沟槽
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申请号: US10016605申请日: 2001-10-30
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公开(公告)号: US06777737B2公开(公告)日: 2004-08-17
- 发明人: Jack A. Mandelman , Dureseti Chidambarrao , Ramachandra Divakaruni
- 申请人: Jack A. Mandelman , Dureseti Chidambarrao , Ramachandra Divakaruni
- 主分类号: H01L27108
- IPC分类号: H01L27108
摘要:
A semiconductor memory structure having a feature size of less than about 90 nm which exhibits little or no dynamic charge loss and little or no trap assisted junction leakage is provided. Specifically, the semiconductor structure includes at least one back-to-back pair of trench storage memory cells present in a Si-containing substrate. Each memory cell includes a vertical transistor overlaying a trench capacitor. Strap outdiffusions are present on each vertical sidewall of the trench storage memory cells so as to interconnect the vertical transistor and the trench capacitor of each memory cell to the Si-containing substrate. A punchthrough stop doping pocket is located between each back-to-back pair of trench storage memory cells and it is centered between the strap outdiffusions of adjacent storage trenches, and self-aligned to the adjacent storage trenches.
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