发明授权
- 专利标题: Data output circuit with reduced output noise
- 专利标题(中): 数据输出电路具有降低的输出噪声
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申请号: US10217391申请日: 2002-08-14
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公开(公告)号: US06777986B2公开(公告)日: 2004-08-17
- 发明人: Hideto Hidaka , Masakazu Hirose
- 申请人: Hideto Hidaka , Masakazu Hirose
- 优先权: JP6-280958 19941115
- 主分类号: H03K300
- IPC分类号: H03K300
摘要:
A data output drive transistor is rendered conductive when the potential of an internal node attains an H level, whereby an output node is discharged to the level of ground potential. When the drive transistor is turned on, the output node is discharged to the level of ground potential at high speed. This drive transistor is turned on for a predetermined time period when output of a high level data is completed, whereby the output node is discharged to the level of the ground potential for a predetermined time period. As a result, the potential of the output node is lowered from a high level to an intermediate level, so that the amplitude of a subsequent output signal is reduced. An output circuit that can effectively prevent generation of ringing with no increase in the access time is provided. A countermeasure is provided to suppress a ringing at output node which drives the output node at high speed when the output node potential attains a potential at which no ringing is caused. A stable output signal is provided at high speed.
公开/授权文献
- US20020196057A1 Data output circuit with reduced output noise 公开/授权日:2002-12-26
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