发明授权
- 专利标题: Semiconductor device having dummy patterns for metal CMP
- 专利标题(中): 具有用于金属CMP的虚设图案的半导体器件
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申请号: US10309272申请日: 2002-12-04
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公开(公告)号: US06784548B2公开(公告)日: 2004-08-31
- 发明人: Hiroyuki Kouno , Toshio Kumamoto , Takahiro Miki , Hisayasu Satoh
- 申请人: Hiroyuki Kouno , Toshio Kumamoto , Takahiro Miki , Hisayasu Satoh
- 主分类号: H01L2348
- IPC分类号: H01L2348
摘要:
A gate electrode has a relatively long gate length of e.g., about 10 &mgr;m. In a region immediately above the gate electrode which is sandwiched between first-layer metals provided is a metal dummy pattern having a width in the first direction and extending in the second direction perpendicular to a direction of gate length (direction of current flow). Moreover, a geometric center of the metal dummy pattern in the second direction is equal to a geometric center of the gate electrode in the second direction. This maintains the symmetry in shape of the metal dummy pattern as viewed from the gate electrode. Such a structure can make deterioration in characteristics of a plurality of elements uniform while maintaining the essential effect of a metal CMP.
公开/授权文献
- US20030071263A1 Semiconductor device having dummy patterns for metal CMP 公开/授权日:2003-04-17
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