Invention Grant
- Patent Title: Test assembly for integrated circuit package
- Patent Title (中): 集成电路封装测试组件
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Application No.: US10121650Application Date: 2002-04-15
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Publication No.: US06788092B2Publication Date: 2004-09-07
- Inventor: Po Jen Cheng , Chiu Wen Lee , Jin Zhu Lee , Heng Yu Kung
- Applicant: Po Jen Cheng , Chiu Wen Lee , Jin Zhu Lee , Heng Yu Kung
- Main IPC: G01R3126
- IPC: G01R3126

Abstract:
A test assembly for an integrated circuit package includes a package substrate and a test board. The package substrate is provided with a plurality of first contact pads linked in a first daisy chain pattern. The test board has a plurality of second contact pads linked in a second daisy chain pattern and a plurality of test pads. All of the second contact pads are divided into a plurality of groups each connected to one pair of test pads. All of the second contact pads in any group are arranged in a line. The present invention further provides a method of testing an integrated circuit package utilizing the aforementioned package substrate and test board.
Public/Granted literature
- US20030193344A1 Test assembly for integrated circuit package Public/Granted day:2003-10-16
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