发明授权
- 专利标题: Multi-phase clock transmission circuit and method
- 专利标题(中): 多相时钟传输电路及方法
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申请号: US10361610申请日: 2003-02-11
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公开(公告)号: US06794912B2公开(公告)日: 2004-09-21
- 发明人: Takashi Hirata , Toru Iwata
- 申请人: Takashi Hirata , Toru Iwata
- 优先权: JP2002-040158 20020218
- 主分类号: H03D324
- IPC分类号: H03D324
摘要:
A multi-phase clock transmission circuit includes: a clock generator for generating a clock synchronizing with a reference clock and a control signal responsive to the phase difference between the reference clock and the generated clock; and a delay circuit for generating a multi-phase clock based on the clock and the control signal. The clock generator generates a signal having a frequency equal to an integral multiple of the frequency of the reference clock and outputs the signal as the clock. The delay circuit has a circuit receiving the clock and including a plurality of delay elements in cascade connection each giving a delay according to the control signal to an input signal. Signals output from the plurality of delay elements are used as signals constituting the multi-phase clock.
公开/授权文献
- US20030155953A1 Multi-phase clock transmission circuit and method 公开/授权日:2003-08-21
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