There is provided a PLO device which performs high-accuracy, high-quality clock recovery. A shifted data generation part generates shifted data, and a first phase comparison part outputs first difference data. A first filter removes an alternating-current component from the first difference data and outputs a first detection voltage. A delay part delays input data for a time corresponding to half of one time slot with the use of an analog delay element and outputs delayed data. A second phase comparison part compares the phases of the input data and delayed data with each other and outputs second difference data. A second filter removes an alternating-current component from the second difference data and outputs a second detection voltage. An arithmetic section divides the first detection voltage by the second detection voltage to obtain a control voltage. A clock oscillation section outputs recovered clock based on the control voltage.