Invention Grant
US06852568B2 Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability 失效
集成电路封装的引脚分配方法,以提高静电放电保护能力

  • Patent Title: Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability
  • Patent Title (中): 集成电路封装的引脚分配方法,以提高静电放电保护能力
  • Application No.: US10281069
    Application Date: 2002-09-16
  • Publication No.: US06852568B2
    Publication Date: 2005-02-08
  • Inventor: Shi-Tron Lin
  • Applicant: Shi-Tron Lin
  • Applicant Address: TW
  • Assignee: Winbond Electronics Corp.
  • Current Assignee: Winbond Electronics Corp.
  • Current Assignee Address: TW
  • Agent Raymond Sun
  • Priority: TW86115577A 19971022
  • Main IPC: H01L23/60
  • IPC: H01L23/60 H01L21/44 H01L21/48 H01L21/50
Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability
Abstract:
A pin-assignment method is provided for use on an IC package to arrange pin connections. The pin-assignment method can allow an improvement in the electro-static discharge (ESD) protection capability for the IC chip packed in the IC package. Specifically, the pin-assignment method organizes the no-connect pins of the IC package into groups and then assigns each of the two pins that bound each no-connect pin group to be connected to a power bus of the IC chip. This allows for an increased ESD protective capability for the no-connect pins. Moreover, the pin-assignment method can simplify the wiring complexity of the IC package.
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