发明授权
US06854079B1 Apparatus and method for reducing test resources in testing Rambus DRAMs
失效
在测试Rambus DRAM中减少测试资源的装置和方法
- 专利标题: Apparatus and method for reducing test resources in testing Rambus DRAMs
- 专利标题(中): 在测试Rambus DRAM中减少测试资源的装置和方法
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申请号: US09653112申请日: 2000-08-31
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公开(公告)号: US06854079B1公开(公告)日: 2005-02-08
- 发明人: Chris Cooper , Siang Tian Giam , Jerry D. McBride , Scott N. Gatzemeier , Scott L. Ayres , David R. Brown
- 申请人: Chris Cooper , Siang Tian Giam , Jerry D. McBride , Scott N. Gatzemeier , Scott L. Ayres , David R. Brown
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Knobbe, Martens, Olson & Bear, LLP
- 主分类号: G01R31/02
- IPC分类号: G01R31/02 ; G11C29/00 ; G11C29/26 ; G11C29/40 ; G11C29/48 ; G11C7/00 ; G11C8/00
摘要:
An apparatus and a method are disclosed for reducing the pin driver count required for testing computer memory devices, specifically Rambus DRAM, while a die is on a semiconductor wafer. By reducing the pin count, more DRAMs can be tested at the same time, thereby reducing test cost and time. One preferred embodiment utilizes a trailing edge of a precharge clock to select a new active bank address, so that the address line required to select a new active address does not have to be accessed at the same time as the row lines.
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