发明授权
- 专利标题： Utilization of MACRO power routing area for buffer insertion
- 专利标题（中）： 利用MACRO电源路由区进行缓冲区插入
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申请号： US10283892申请日： 2002-10-30
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公开(公告)号： US06855967B2公开(公告)日： 2005-02-15
- 发明人: Louis Chao-Chiuan Liu , Chien-Wen Chen
- 申请人： Louis Chao-Chiuan Liu , Chien-Wen Chen
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company
- 当前专利权人： Taiwan Semiconductor Manufacturing Company
- 当前专利权人地址： TW Hsin-Chu
- 代理商 Howard Chen
- 主分类号： H01L23/528
- IPC分类号： H01L23/528 ; H01L27/10 ; H01L23/04 ; H01L23/48 ; H01L23/52
摘要：
A structure and a method for forming buffer cells in power line areas between macro cell in a macro block area. In a power line level, a pin is formed between VSS and VDD lines. The pin is connected to the buffer cell. Next a signal line layer is formed and the signal line is connected to the pin and to a driver. In a first embodiment the driver is formed in a standard cell area. In a second embodiment, the driver is formed in a macro cell. A signal line is connected to the pin and the driver.