发明授权
US06880045B2 Multi-processor computer system with transactional memory 有权
具有事务性存储器的多处理器计算机系统

Multi-processor computer system with transactional memory
摘要:
A cache coherent distributed shared memory multi-processor computer system is provided which supports transactional memory semantics. A cache flushing engine and temporary buffer allow selective forced write-backs of dirty cache lines to the home memory. A flush can be performed from the updated cache to the temporary buffer and then to the home memory after confirmation of receipt or from the updated cache to the home memory directly with the temporary buffer holding the old data until confirmation that the home memory contains the update.
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