发明授权
US06893929B1 Method of forming strained silicon MOSFET having improved threshold voltage under the gate ends
有权
形成栅极末端具有改善的阈值电压的应变硅MOSFET的方法
- 专利标题: Method of forming strained silicon MOSFET having improved threshold voltage under the gate ends
- 专利标题(中): 形成栅极末端具有改善的阈值电压的应变硅MOSFET的方法
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申请号: US10641548申请日: 2003-08-15
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公开(公告)号: US06893929B1公开(公告)日: 2005-05-17
- 发明人: Qi Xiang , Ming Ren Lin , Minh V. Ngo , Haihong Wang
- 申请人: Qi Xiang , Ming Ren Lin , Minh V. Ngo , Haihong Wang
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Foley & Lardner LLP
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/762 ; H01L21/8234 ; H01L29/10
摘要:
The formation of shallow trench isolations in a strained silicon MOSFET includes implantation of a dopant into overhang portions of the strained silicon layer and silicon germanium layer at the edges of trenches in which shallow trench isolations are to be formed. The conductivity type of the dopant is chosen to be opposite the conductivity type of the source and drain dopants. The implanted dopant increases the threshold voltage Vt beneath the ends of the gate in overhang portions of the strained silicon layer so that it is approximately equal to or greater than that of the remainder of the MOSFET. The resulting strained silicon MOSFET exhibits reduced leakage current beneath the ends of the gate.
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