发明授权
US06895497B2 Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority
失效
多分配CPU集成电路具有虚拟化和模块化资源，可调整调度优先级
- 专利标题： Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority
- 专利标题（中）： 多分配CPU集成电路具有虚拟化和模块化资源，可调整调度优先级
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申请号： US10092714申请日： 2002-03-06
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公开(公告)号： US06895497B2公开(公告)日： 2005-05-17
- 发明人: Eric S. Fetzer , Wayne Kever , Eric DeLano
- 申请人： Eric S. Fetzer , Wayne Kever , Eric DeLano
- 申请人地址： US TX Houston
- 专利权人： Hewlett-Packard Development Company, L.P.
- 当前专利权人： Hewlett-Packard Development Company, L.P.
- 当前专利权人地址： US TX Houston
- 主分类号： G06F9/38
- IPC分类号： G06F9/38
摘要：
A multiple dispatch processor has several instruction fetch units, each for providing a stream of instructions to an instruction decode and dispatch unit. The processor also has an resource allocation unit, and multiple resources such as combined integer and address execution pipelines and floating point execution pipelines. Each instruction decode and dispatch unit requests resources needed to perform an instruction of the resource allocation unit, which arbitrates among the multiple instruction decode and dispatch units.