发明授权
US06897701B2 Method and structure for improving the linearity of MOS switches 有权
提高MOS开关线性度的方法和结构

Method and structure for improving the linearity of MOS switches
摘要:
A technique is provided to linearize a MOS switch on-resistance and the nonlinear junction capacitance. The technique linearizes the sampling switch by using a buffer having substantially unity gain with proper DC shift to drive an isolated bulk terminal of the MOS well to improve the spurious free dynamic range (SFDR). In this way, the 2nd-order effect such as nonlinear body effect (VT(VSB)) and nonlinear junction capacitance (Cj(VSB)) can be substantially removed.
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