发明授权
- 专利标题： Semiconductor device having a high breakdown voltage for use in communication systems
- 专利标题（中）： 具有用于通信系统的高击穿电压的半导体器件
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申请号： US10343097申请日： 2001-11-21
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公开(公告)号： US06903383B2公开(公告)日： 2005-06-07
- 发明人: Toshiya Yokogawa , Asamira Suzuki , Masahiro Deguchi , Shigeo Yoshii , Hiroyuki Furuya
- 申请人： Toshiya Yokogawa , Asamira Suzuki , Masahiro Deguchi , Shigeo Yoshii , Hiroyuki Furuya
- 申请人地址： JP Osaka
- 专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址： JP Osaka
- 国际申请： PCT/JP01/10192 WO 20011121
- 国际公布： WO02/43156 WO 20020530
- 主分类号： H01L21/8252
- IPC分类号： H01L21/8252 ; H01L27/06 ; H01L29/20 ; H01L29/778 ; H03F3/60 ; H01L31/0328 ; H01L31/0336 ; H01L31/072 ; H01L31/109
摘要：
A HEMT has an InAlAs layer (202), an InGaAs layer (203), a multiple δ-doped InAlAs layer (204) composed of n-type doped layers (204a) and undoped layers (204b) which are alternately stacked, an InP layer (205), a Schottky gate electrode (210), a source electrode (209a), and a drain electrode (209b) on an InP substrate (201). When a current flows in a region (channel region) of the InGaAs layer (203) adjacent the interface between the InGaAs layer (203) and the multiple δ-doped InAlAs layer (204), a breakdown voltage in the OFF state can be increased, while resistance to the movement of carriers passing through the multiple δ-doped InAlAs layer (204) as a carrier supplying layer is reduced.
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