Invention Grant
US06913981B2 Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
有权
使用选择性外延生长SiGe基层制造双极晶体管的方法
- Patent Title: Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
- Patent Title (中): 使用选择性外延生长SiGe基层制造双极晶体管的方法
-
Application No.: US10441763Application Date: 2003-05-19
-
Publication No.: US06913981B2Publication Date: 2005-07-05
- Inventor: Jay Albert Shideler , Jayasimha Swamy Prasad , Ronald Lloyd Schlupp , Robert William Bechdolt
- Applicant: Jay Albert Shideler , Jayasimha Swamy Prasad , Ronald Lloyd Schlupp , Robert William Bechdolt
- Applicant Address: US CA San Jose
- Assignee: Micrel, Incorporated
- Current Assignee: Micrel, Incorporated
- Current Assignee Address: US CA San Jose
- Agency: Bever, Hoffman & Harms, LLP
- Main IPC: H01L21/331
- IPC: H01L21/331 ; H01L29/10 ; H01L29/737 ; H01L21/8222

Abstract:
Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielectric isolation layer overlying the base layer, and an emitter structure overlying the dielectric isolation layer and contacting the base layer through a central aperture in the dielectric layer. The transistor may be a heterojunction bipolar transistor with the base layer formed of a selectively grown silicon germanium alloy. A dielectric spacer may be formed adjacent the emitter structure and over a portion of the base layer.
Public/Granted literature
- US20040043576A1 Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer Public/Granted day:2004-03-04
Information query
IPC分类: